PART |
Description |
Maker |
MAX3991 MAX3991UTG |
DC to 4-GBPS Dual 1:2 MUX/Repeater/Equalizer 48-VQFN -40 to 85 10Gbps Clock and Data Recovery with Limiting Amplifier 10 Gbps clock and data recovery with limiting amplifier
|
Maxim Integrated Products, Inc. MAXIM - Dallas Semiconductor
|
SY87700V SY87700VHC SY87700VZC |
5V/3.3V 32-175Mbps AnyRate??CLOCK AND DATA RECOVERY 5V/3.3V 32-175Mbps AnyRateCLOCK AND DATA RECOVERY CLOCK RECOVERY CIRCUIT, PDSO28 Isolation Transformer 5V/3.3V 32-175Mbps AnyRate CLOCK AND DATA RECOVERY 5V/3.3V 32-175Mbps AnyRate⑩ CLOCK AND DATA RECOVERY
|
Micrel Semiconductor, Inc. Micrel Semiconductor,Inc. MICREL[Micrel Semiconductor]
|
AD802 AD800 AD800-52BR AD800-45BQ AD802-155BR AD80 |
Clock Recovery and Data Retiming Phase-Locked Loop Clock Recovery and Data Retiming Phase-Locked Loop PHASE LOCKED LOOP, PDSO20 Clock Recovery and Data Retiming Phase-Locked Loop(时钟恢复和重定时PLL) AD800/AD802: Clock Recovery and Data Retiming Phase-Locked Loop Data Sheet (Rev. B. 12/93) 45 or 52 Mbps Clock and Data Recovery IC
|
Analog Devices, Inc.
|
VSC1236 VSC1235 |
9.9 to 12.5 Gbps 16:1 Multiplexer with Clock Multiplier Unit and Demultiplexer with Clock Recovery Chip Set
|
Vitesse Semiconductor Corporation.
|
IDT5T9050PGI IDT5T9050 |
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFERJR 2.5V的单数据传输速率1:5时钟缓冲器TERABUFFER⑩JR 2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER⑩ JR 2.5V Single Data Rate 1:5 Clock Buffer Terabuffer Jr.
|
Integrated Device Technology, Inc. IDT[Integrated Device Technology]
|
106414-1403 |
QSFP to MPO Quad Data Rate PSM4 Active Optical Cable, 40 Gbps Data Rate, 4dB Loss Budget, Cable Length 3.0m
|
Molex Electronics Ltd.
|
106414-1205 |
QSFP to MPO Quad Data Rate PSM4 Active Optical Cable, 40 Gbps Data Rate, 2dB Loss Budget, Cable Length 5.0m
|
Molex Electronics Ltd.
|
M13S5121632A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
M13S2561616A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
M14D5121632A-2K |
Internal pipelined double-data-rate architecture; two data access per clock cycle
|
Elite Semiconductor Mem...
|
W972GG6JB W972GG6JB-25 |
16M ?8 BANKS ?16 BIT DDR2 SDRAM Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
NBSG53A NBSG53AMN NBSG53AMNR2 NBSG53ABAR2 NBSG53AB |
2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
|
ONSEMI[ON Semiconductor]
|